Democratizing Chip Designing in India

· CDAC to Pool Design Licences in 120 Institutions

· Now Anyone from Anywhere can Design Chips & Innovate as MeitY brings Design Infrastructure to Doorstep

· India Chip Centre at CDAC to Pool the Design Licenses Centrally to be made available to Students at Remote Locations for Designing Chips

· chip design infrastructure at India Chip Centre (C-DAC), leading industry vendors from EDA (Electronic Design Automation), Electronic Computer-Aided Design (ECAD), IP Core and Design solutions

· Specific collaborative arrangements are being made available with Synopsys, Cadence Design Systems, Siemens EDA, Silvaco & other leading tool vendors, IP & design solution providers and Fab aggregators.

· chip design infrastructure at door-steps of over 85,000 students at 120 academic institutions

· the semiconductor design strength in our country, make up for 20% of the world’s engineers.

Ministry of Electronics and Information Technology (MeitY) with its series of graded and proactive steps, is in the process of systematic overhaul of semiconductor design approach at 120 premier academic institutions across the country to debut an era of creative enablement where anyone with innate skills, anywhere in the country can get the semiconductor chips designed. In the process, chip design will be democratized in line with the vision of Prime Minister Narendra Modi that - Design in India is as important as Make in India.

Understanding chip design as a strategic necessity, a pilot deployment was successfully tested by MeitY earlier in 2021 under Special Manpower Development Programme for Chips to System Design (SMDP-C2SD), wherein a centralized design facility at C-DAC was enabled for remote access by over 50,000 engineering students at 60 academic institutions for designing chips. Leapfrogging, MeitY now intends to make accessible a centralized chip design infrastructure to be made available at India Chip Centre setup at C-DAC, to train 85000+ B.Tech, M.Tech and PhD students at 120 academic institutions across the country in chip design area for next 5 years.

For making available the chip design infrastructure at India Chip Centre (C-DAC), leading industry vendors from EDA (Electronic Design Automation), Electronic Computer-Aided Design (ECAD), IP Core and Design solutions Industry are being partnered with. Specific collaborative arrangements are being made available with Synopsys, Cadence Design Systems, Siemens EDA, Silvaco & other leading tool vendors, IP & design solution providers and Fab aggregators.

At centralized design facility hosted at India Chip Centre (C-DAC), not only the most advanced tools for entire chip design cycle (i.e. Front-end design, Back-end design, PCB design & analysis etc. for Digital, Analog, RF & Mixed Signal designs), going up to 7nm or advanced node but also an arrangement of instructor-led/ online trainings on design flows by industry professionals are being made available for next 5 years.

This centralized facility at India Chip Centre (C-DAC), one of the biggest of existing facilities, offering plethora of design flows, aims to bring the chip design infrastructure at door-steps of over 85,000 students at 120 academic institutions. Taking advantage, several academic start-ups will mushroom across the country, cross the initial entry barriers and pave the way for entrepreneurship/ startup-led design & innovations ecosystem in the country making indigenous IP Cores, Chips, System on Chip (SoCs), Systems for different application areas like 5G/ IoT, AI/ ML, Automotive & Mobility sector etc. in India, for the World.

As SemiconIndia 2022 concluded successfully last week, most of the global semiconductor leaders (like Intel, Micron, Qualcomm, LAM Research etc) not only highlighted the contribution of their Indian R&D centres, which are now the biggest centres out of their headquarter locations but also acknowledged the semiconductor design strength in our country, which now makes up for 20% of the world’s engineers.

Ashwini Vaishnaw, Minister for Electronics & Information Technology envisions making available a design talent pool of highly skilled engineers for turning India into a semiconductor hub through the Chips to Startup (C2S) Programme and other initiatives in Semiconductor policy. This will strengthen & supplement the Indian talent pool designing the leading-edge chips for semiconductor giants with complete ownership of some of these chips in the country. Speaking at SemiconIndia 2022, he highlighted that India's democracy and talent pool sets it apart from other countries fighting for chip sovereignty.

Many co-development pacts were announced at SemiconIndia 2022 last week by Rajeev Chandrasekhar, Minister of State for Electronics & Information Technology including Digital India RISC-V (DIR-V) Program, aiming to catalyze India’s semiconductor ecosystem. These announcements, coupled with the fact that India has just scored a century of Unicorns this week and the steps taken to democratize the chip design across the country, shall trigger the next wave of Startups and unicorns from semiconductor design space in the country.